1. Field of the Invention
The present invention relates to a manufacturing method of a semiconductor device having a fine pattern, and more particularly to a semiconductor device manufacturing method capable of inhibiting any break of a resist pattern caused by the reflection of an exposure light and thereby realizing fine patterning.
2. Description of the Related Art
Recently, a design rule of an LSI (Large Scale Integration) is becoming finer and finer for the pursuit of higher density and higher speed in the LSI. According to this, the wavelength of an exposure light is trending toward shorter, for example, from 365 nm (i-line of a mercury lamp) to 248 nm (KrF excimer laser). Further, a light of 193 nm (ArF excimer laser) is being used for fine patterning, as an exposure light.
In case of forming a fine pattern by use of such an exposure light of short wavelength, the conventional anti-reflective coating has such a problem that a resist pattern is easily broken due to the reflection of an exposure light; therefore, it is difficult to obtain a desired fine pattern. Especially, in case of patterning an insulation coating between layers on aluminum wiring formed by the damascene method, break of a resist pattern occurs due to the reflection of an exposure light from the aluminum wiring as an underlayer.
In order to form a desired fine pattern by use of such a short length exposure light, O, N, and C ion-implanted amorphous silicon is used as an antireflective coating in the conventional anti-reflective coating manufacturing method disclosed in Japanese Patent Publication Laid-Open No. 7-130598, and a manner of implanting Ce ion into the SiO.sub.2 as an anti-reflective coating and thereby heating the same is described in a pattern forming method disclosed in Japanese Patent Publication Laid-Open No. 5-217884.
As mentioned above, in case of forming a fine pattern by use of an exposure light of short length, the conventional anti-reflective coating has such a problem that a resist pattern is easily broken due to the reflection of an exposure light; therefore a desired fine pattern cannot be obtained. For example, in patterning an insulation coating between layers on the aluminum wiring formed in the damascene method, break of a resist pattern occurs by the reflection of an exposure light from the aluminum wiring.
In the method of using an amorphous silicon as the anti-reflective coating in order to inhibit break of such a resist pattern, which is disclosed in Japanese Patent Publication Laid-Open No. 7-130598, if the amorphous silicon of a semiconductor is not turned to be an insulation coating by ion implantation, insulating ability between the wiring cannot be provided enough when an object to be patterned is a metal coating; accordingly, implantation of high density ion is required in order to enhance the insulating ability of the amorphous silicon. Therefore, productivity is deteriorated by an increase in defect density of a semiconductor device caused by the ion implantation damage into a substrate and by an increase in ion implantation time, which results in increasing the cost of a semiconductor device.
In the method of implanting Ce ion into SiO.sub.2 as an anti-reflective coating in Japanese Patent Publication Laid-Open No. 5-217884, Ce cannot be used for any other purpose than this in a semiconductor manufacturing process; therefore, it is necessary to provide extra Ce sources in an ion implantation device, which results in increasing the manufacturing cost of a semiconductor device.